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CS8182 Micropower 200 mA Low Dropout Tracking Regulator/Line Driver
The CS8182 is a monolithic integrated low dropout tracking regulator designed to provide adjustable buffered output voltage that closely tracks (10 mV) the reference input. The output delivers up to 200 mA while being able to be configured higher, lower or equal to the reference voltages. The output has been designed to operate over a wide range (2.8 V to 45 V) while still maintaining excellent DC characteristics. The CS8182 is protected from reverse battery, short circuit and thermal runaway conditions. The device also can withstand 45 V load dump transients and -50 V reverse polarity input voltage transients. This makes it suitable for use in automotive environments. The VREF/ENABLE lead serves two purposes. It is used to provide the input voltage as a reference for the output and it also can be pulled low to place the device in sleep mode where it nominally draws less than 30 mA from the supply.
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8 1 SO-8 DF SUFFIX CASE 751 1 5 D2PAK-5 DPS SUFFIX CASE 936AC
PIN CONNECTIONS AND MARKING DIAGRAMS
VOUT GND GND Adj 1 8182 ALYW VIN GND GND VREF/ENABLE Tab GND Pin 1. VIN 2. VOUT 3. GND 4. Adj 5. VREF
* * * * * * * * *
200 mA Source Capability Output Tracks within 10 mV Worst Case Low Dropout (0.35 V Typ. @ 200 mA) Low Quiescent Current Thermal Shutdown Short Circuit Protection Wide Operating Range Internally Fused Leads in SO-8 Package For Automotive and Other Applications Requiring Site and Change Control
VOUT
CS8182 AWLYWW
1 A WL, L YY, Y WW, W = Assembly Location = Wafer Lot = Year = Work Week
VIN
ORDERING INFORMATION*
Current Limit & SAT Sense Adj Device CS8182YDF8 -
ENABLE
Package SO-8 SO-8 D2PAK 5-PIN
Shipping 95 Units/Rail 2500 Tape & Reel 50 Units/Rail 750 Tape & Reel
CS8182YDFR8 CS8182YDPS5
+
VREF/ENABLE
CS8182YDPSR5 D2PAK 5-PIN
+ GND Thermal Shutdown - 2.0 V
*Consult your local sales representative for SO-8 with exposed pads package option. For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
Figure 1. Block Diagram
(c) Semiconductor Components Industries, LLC, 2004
1
August, 2004 - Rev. 21
Publication Order Number: CS8182/D
CS8182
PACKAGE PIN DESCRIPTION
Package Lead Number SO-8 8 1 2, 3, 6, 7 4 5 D2PAK 5-PIN 1 2 3 4 5 Lead Symbol VIN VOUT GND Adj VREF/ENABLE Input voltage. Regulated output. Ground. Adjust lead. Reference voltage and ENABLE input. Function
MAXIMUM RATINGS
Rating Storage Temperature Supply Voltage Range (continuous) Supply Voltage Range (normal, continuous) Peak Transient Voltage (VIN = 14 V, Load Dump Transient = 31 V) Voltage Range (Adj, VOUT, VREF/ENABLE) Maximum Junction Temperature Package Thermal Resistance, SO-8: Junction-to-Case, RqJC Junction-to-Ambient, RqJA Package Thermal Resistance, D2PAK, 5-Pin: Junction-to-Case, RqJC Junction-to-Ambient, RqJA ESD Capability (Human Body Model) (Machine Model) Lead Temperature Soldering: (Note 1) Reflow: (SO-8) (D2PAK) Value -65 to 150 -15 to 45 3.4 to 45 45 -10 to 45 150 25 110 4.0 10-50** 2.0 200 240 peak 225 peak (Note 2) Unit C V V V V C C/W C/W C/W C/W kV V C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. 60 second maximum above 183C. 2. -5C/+0C allowable conditions. *Depending on thermal properties of substrate. RqJA = RqJC + RqCA
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CS8182
ELECTRICAL CHARACTERISTICS (VIN = 14 V; VREF/ENABLE > 2.75 V; -40C < TJ < +125C; COUT 10 mF; 0.1 W < COUT-ESR < 1.0 W @ 10 kHz, unless otherwise specified.)
Parameter Regular Output VREF - VOUT VOUT Tracking Error Dropout Voltage (VIN - VOUT) 4.5 V VIN 26 V, 100 mA IOUT 200 mA, Note 3 VIN = 12 V, IOUT = 30 mA, VREF = 5.0 V, Note 3 IOUT = 100 mA IOUT = 30 mA IOUT = 200 mA 4.5 V VIN 26 V, Note 3 100 mA IOUT 200 mA, Note 3 Loop in Regulation VIN = 14 V, VREF = 5.0 V, VOUT = 90% of VREF, Note 3 VIN = 12 V, IOUT = 200 mA VIN = 12 V, IOUT = 100 mA VIN = 12 V, VREF/ENABLE = 0 V VOUT = 5.0 V, VIN = 0 V f = 120 Hz, IOUT = 200 mA, 4.5 V VIN 26 V GBD -10 -5.0 - - - - - - 225 - - - - 60 150 - - 100 - 350 - - 0.2 - 15 75 30 0.2 - 180 10 5 150 500 600 10 10 1.0 700 25 150 55 1.5 - 210 mV mV mV mV mV mV mV mA mA mA mA mA mA dB C Test Conditions Min Typ Max Unit
Line Regulation Load Regulation Adj Lead Current Current Limit Quiescent Current (IIN - IOUT)
Reverse Current Ripple Rejection Thermal Shutdown VREF/ENABLE Enable Voltage Input Bias Current 3. VOUT connected to Adj lead.
- VREF/ENABLE
0.80 -
2.00 0.2
2.75 1.0
V mA
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CS8182
TYPICAL CHARACTERISTICS
18 QUIESCENT CURRENT (mA) 16 14 12 10 8 6 4 2 0 0 20 40 60 80 100 120 140 160 180 200 OUTPUT CURRENT (mA)
Figure 2. Quiescent Current vs. Output Current
1 QUIESCENT CURRENT (mA) 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 5 I (VOUT) = 1 mA 10 15 20 25 30 35 40 45 VIN, INPUT VOLTAGE (V) I (VOUT) = 20 mA QUIESCENT CURRENT (mA)
100 90 80 70 60 50 40 30 20 10 0 0 5 10 15 20 25 30 35 40 45 VIN, INPUT VOLTAGE (V) VREF/ ENABLE = 0 V
Figure 3. Quiescent Current vs. Input Voltage (Operating Mode)
Figure 4. Quiescent Current vs. Input Voltage (Sleep Mode)
20 18 CURRENT INTO VOUT (mA) 16 14 12 10 8 6 4 2 0 0 5 VIN = 0 V 10 15 20 25 FORCED VOUT VOLTAGE (V) VIN = 6 V* VREF = 5 V** CURRENT INTO VOUT (mA) * Graph is duplicate for VIN > 1.6 V. **Dip (@5 V) shifts with VREF voltage.
140 120 100 80 60 40 20 0 0 5 10 15 20 25 30 35 40 FORCED VOUT VOLTAGE (V) VIN = 6 V* VREF = 5 V** VIN = 0 V * Graph is duplicate for VIN > 1.6 V. **Dip (@5 V) shifts with VREF voltage.
Figure 5. VOUT Reverse Current
Figure 6. VOUT Reverse Current
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CS8182
CIRCUIT DESCRIPTION
ENABLE Function Output Voltage
By pulling the VREF/ENABLE lead below 2.0 V typically, (see Figure 10 or Figure 11), the IC is disabled and enters a sleep state where the device draws less than 55 mA from supply. When the VREF/ENABLE lead is greater than 2.75 V, VOUT tracks the VREF/ENABLE lead normally.
The output is capable of supplying 200 mA to the load while configured as a similar (Figure 7), lower (Figure 9), or higher (Figure 8) voltage as the reference lead. The Adj lead acts as the inverting terminal of the op amp and the VREF lead as the non-inverting. The device can also be configured as a high-side driver as displayed in Figure 12.
VOUT, 200 mA Loads VOUT C2** GND 10 mF RF GND Adj RA
CS8182
CS8182
VOUT, 200 mA Loads VOUT C2** GND 10 mF GND Adj
VIN GND GND C3*** 10 nF C1* 1.0 mF
B+
VIN GND GND C3*** 10 nF C1* 1.0 mF
B+
VREF/ ENABLE
5.0 V
VREF/ ENABLE
VREF
VOUT + VREF
R VOUT + VREF(1 ) E) RA
Figure 7. Tracking Regulator at the Same Voltage
VOUT, 200 mA Loads VOUT C2** GND 10 mF GND Adj
Figure 8. Tracking Regulator at Higher Voltages
VOUT, 200 mA
VIN CS8182 GND GND R1 C3*** 10 nF C1* 1.0 mF
B+
VOUT CS8182 GND GND
VIN GND GND R C3*** 10 nF C1* 1.0 mF
B+
C2** 10 mF
VREF/ ENABLE
VREF R2 from MCU
Adj
VREF/ ENABLE
VREF
VOUT + VREF( R2 ) R1 ) R2
Figure 9. Tracking Regulator at Lower Voltages
VIN 100 nF 5.0 V To Load 10 mF (e.g. sensor) VOUT CS8182 GND GND Adj VIN GND GND I/O C3*** 10 nF C1* 1.0 mF mC VREF (5.0 V)
Figure 10. Tracking Regulator with ENABLE Circuit
6.0 V-40 V
NCV8501
200 mA
VOUT CS8182 GND GND Adj
VIN GND GND C3*** 10 nF
B+
VREF/ ENABLE
MCU
VREF/ ENABLE
VOUT + B ) * VSAT
Figure 11. Alternative ENABLE Circuit
* C1 is required if the regulator is far from the power source filter. ** C2 is required for stability. *** C3 is recommended for EMC susceptibility.
Figure 12. High-Side Driver
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CS8182
APPLICATION NOTES
VOUT Short to Battery
The CS8182 will survive a short to battery when hooked up the conventional way as shown in Figure 13. No damage to the part will occur. The part also endures a short to battery when powered by an isolated supply at a lower voltage as in
Short to battery
Figure 14. In this case the CS8182 supply input voltage is set at 7 V when a short to battery (14 V typical) occurs on VOUT which normally runs at 5 V. The current into the device (ammeter in Figure 14) will draw additional current as displayed in Figure 15.
Loads
VOUT 70 mA C2** 10 mF
B+ VOUT CS8182 GND GND Adj VIN GND GND 5.0 V + 5.0 V - C1* 1.0 mF + Automotive Battery - typically 14 V
VREF/ ENABLE
C3*** 10 nF
VOUT = VREF
Figure 13.
Short to battery A Automotive Battery typically 14 V VOUT 70 mA VOUT CS8182 GND GND Adj * C1 is required if the regulator is far from the power source filter. ** C2 is required for stability. *** C3 is recommended for EMC susceptibility. VIN GND GND 5.0 V + 5.0 V - B+ C1* 7V 1.0 mF + -
Loads
C2** 10 mF
VREF/ ENABLE
VOUT = VREF
C3*** 10 nF
Figure 14.
2.0 1.8 1.6 CURRENT (mA) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 5 6 7 8 9 10 1112 1314 15 1617 1819 20 2122 2324 25 26 VOUT VOLTAGE (V) VOUT VOUT CS8182 C2 10 mF GND GND Adj VIN GND GND < 1.0 mA
Switched Application
The CS8182 has been designed for use in systems where the reference voltage on the VREF/ENABLE pin is continuously on. Typically, the current into the VREF/ENABLE pin will be less than 1.0 mA when the voltage on the VIN pin (usually the ignition line) has been switched out (VIN can be at high impedance or at ground.) Reference Figure 16.
Ignition Switch C1 1.0 mF VBAT
Figure 15. VOUT Short to Battery
VREF/ ENABLE
VREF 5.0 V
Figure 16. http://onsemi.com
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CS8182
External Capacitors
The output capacitor for the CS8182 is required for stability. Without it, the regulator output will oscillate. Actual size and type may vary depending upon the application load and temperature range. Capacitor effective series resistance (ESR) is also a factor in the IC stability. Worst-case is determined at the minimum ambient temperature and maximum load expected. The output capacitor can be increased in size to any desired value above the minimum. One possible purpose of this would be to maintain the output voltage during brief conditions of negative input transients that might be characteristic of a particular system. The capacitor must also be rated at all ambient temperatures expected in the system. To maintain regulator stability down to -40C, a capacitor rated at that temperature must be used. More information on capacitor selection for SMART REGULATOR(R)s is available in the SMART REGULATOR application note, "Compensation for Linear Regulators," document number SR003AN/D, available through our website at http://www.onsemi.com.
Calculating Power Dissipation in a Single Output Linear Regulator
The value of RqJA can then be compared with those in the package section of the data sheet. Those packages with RqJA's less than the calculated value in equation 2 will keep the die temperature below 150C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heat sink will be required.
IIN VIN
SMART REGULATOR(R)
IOUT VOUT
Control Features
IQ
Figure 17. Single Output Regulator with Key Performance Parameters Labeled Heatsinks
The maximum power dissipation for a single output regulator (Figure 17) is:
PD(max) + {VIN(max) * VOUT(min)} IOUT(max) ) VIN(max)IQ
(1)
A heatsink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RqJA:
RqJA + RqJC ) RqCS ) RqSA
(3)
where: VIN(max) is the maximum input voltage, VOUT(min) is the minimum output voltage, IOUT(max) is the maximum output current, for the application,and IQ is the quiescent current the regulator consumes at IOUT(max). Once the value of PD(max) is known, the maximum permissible value of RqJA can be calculated:
RqJA + 150C * TA PD
(2)
where: RqJC = the junction-to-case thermal resistance, RqCS = the case-to-heatsink thermal resistance, and RqSA = the heatsink-to-ambient thermal resistance. RqJC appears in the package section of the data sheet. Like RqJA, it is a function of package type. RqCS and RqSA are functions of the package type, heatsink and the interface between them. These values appear in heat sink data sheets of heatsink manufacturers.
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CS8182
PACKAGE DIMENSIONS
SOIC-8 DF SUFFIX CASE 751-07 ISSUE AB
-X- A
8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
B
1 4
S
0.25 (0.010)
M
Y
M
-Y- G C -Z- H D 0.25 (0.010)
M SEATING PLANE
K
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
SOLDERING FOOTPRINT
1.52 0.060 7.0 0.275 4.0 0.155
0.6 0.024
1.270 0.050
SCALE 6:1 mm inches
Figure 18. SOIC-8
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CS8182
PACKAGE DIMENSIONS
D2PAK-5 DP SUFFIX CASE 936AC-01 ISSUE O
A E K S B H W M L P G D R -A- N
DIM A B C D E G H K L M N P R S U V W INCHES MIN MAX 0.396 0.406 0.330 0.340 0.170 0.180 0.026 0.036 0.045 0.055 0.067 REF 0.580 0.620 0.055 0.066 0.000 0.010 0.098 0.108 0.017 0.023 0.090 0.110 0_ 8_ 0.095 0.105 0.30 REF 0.305 REF 0.010 MILLIMETERS MIN MAX 10.05 10.31 8.38 8.64 4.31 4.57 0.66 0.91 1.14 1.40 1.70 REF 14.73 15.75 1.40 1.68 0.00 0.25 2.49 2.74 0.43 0.58 2.29 2.79 0_ 8_ 2.41 2.67 7.62 REF 7.75 REF 0.25 TERMINAL 6
U
V
NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH AND METAL BURR. 4. PACKAGE OUTLINE INCLUSIVE OF PLATING THICKNESS. 5. FOOT LENGTH MEASURED AT INTERCEPT POINT BETWEEN DATUM A AND LEAD SURFACE.
C
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CS8182
SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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CS8182/D

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